Document Outline
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- 4.1.2 Simultaneous LOW level input at input port terminals K00…K03
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- 5 PERIPHERAL CIRCUITS AND THEIR OPERATION
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- 5.3 Oscillation Circuits and Operating Mode
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- 5.4.3 Interrupt function and input comparison register
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- 5.7.6 Operation of clock synchronous transfer
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- 5.10.2 Count operation and setting basic mode
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- 5.10.9 Transmission rate setting of serial interface
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- 5.12.3 Setting of buzzer frequency and sound level
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- 5.13 Supply Voltage Detection (SVD) Circuit
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- 5.14.4 Interrupt priority register and interrupt priority level
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- 5.15 Notes for Low Current Consumption
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Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any
liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or
circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such
as medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there
is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright
infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from
the Ministry of International Trade and Industry or other approval from another government agency.
2001 please use the new product number. For further information, please contact Epson sales
representative.
Package (D: die form; F: QFP)
Model number
Model name (C: microcomputer, digital products)
Product classification (S1: semiconductor)
Version (1: Version 1
Tool classification (C: microcomputer use)
Product classification
(S5U1: development tool for semiconductor products)
E0C88112
E0C88308
E0C88316
E0C88317
E0C88348
E0C88P348
E0C88349
S1C88112
S1C88308
S1C88316
S1C88317
S1C88348
S1C8P348
S1C88349
E0C88F360
E0C88408
E0C88409
E0C88816
E0C88832
E0C88862
E0C88F816
S1C8F360
S1C88408
S1C88409
S1C88816
S1C88832
S1C88862
S1C8F816
ADP88348
ADP88360
DEV88104
DEV88112
DEV88308
DEV88316
DEV88317
DEV88348
DEV88365
DEV88408
DEV88409
S5U1C88348X
S5U1C88360X
S5U1C88104D
S5U1C88112D
S5U1C88308D
S5U1C88316D
S5U1C88317D
S5U1C88348D
S5U1C88365D
S5U1C88408D
S5U1C88409D
DEV88832
DEV88862
DMT88348-DB
ICE88UR
PRC88316
PRC88348
PRC88365
PRC88409
PRC88816
SAP88
URS88348
S5U1C88832D
S5U1C88862D
S5U1C88348T
S5U1C88000H5
S5U1C88316P
S5U1C88348P
S5U1C88365P
S5U1C88409P
S5U1C88816P
S5U1C88000S
S5U1C88348Y
GWH00002
URM00002
S5U1C88000W2
S5U1C88000W1
3.2.2 RAM ......................................................................................................................................... 13
3.2.3 I/O memory .............................................................................................................................. 13
3.2.4 Display memory ....................................................................................................................... 13
4.1.2 Simultaneous LOW level input at input port terminals K00K03 ........................................... 15
4.1.3 Supply voltage detection (SVD) circuit ................................................................................... 16
4.1.4 Initial reset sequence ............................................................................................................... 16
5.2.2 Interrupt function .................................................................................................................... 27
5.2.3 Control of watchdog timer ...................................................................................................... 27
5.2.4 Programming notes ................................................................................................................. 27
5.3.2 Mask option ............................................................................................................................. 28
5.3.3 OSC1 oscillation circuit .......................................................................................................... 28
5.3.4 OSC3 oscillation circuit .......................................................................................................... 29
5.3.5 Operating mode ....................................................................................................................... 29
5.3.6 Switching the CPU clocks ....................................................................................................... 30
5.3.7 Control of oscillation circuit and operating mode .................................................................. 31
5.3.8 Programming notes ................................................................................................................. 32
5.4.2 Mask option ............................................................................................................................. 33
5.4.3 Interrupt function and input comparison register ................................................................... 34
